Hot Chips 21 has a stellar lineup

Atom to Power 7 from the engineers

THE PROGRAM FOR Hot Chips 21 was just released, and it is, umm, hot. The show will have speakers from Chuck Moore to Jen-Hsun Huang, and will cover chips from Atom to Power 7.

The conference, held at Stanford University from August 23-25, 2009, is one of the things to do this summer if you are interested in chip architecture. The breadth of topics and the depth that presenters go to is unmatched elsewhere, and it is all moderated by people at the top of their game.

Take a look at the schedule, printed below, you are almost guaranteed to find something you like. When you do, sign up here, see you thereS|A




HOT Chips brings together designers and architects of high

performance chips, software, and systems. Presentations focus

on up-to-the-minute real developments. This symposium is the

primary forum for engineers and researchers to highlight their

leading-edge designs. Three full days of tutorials and

technical sessions will keep you on top of the industry.



Sunday, August 23, 2009


Morning Tutorial: System Interconnect

Chairs: Chuck Moore (AMD)

Ralph Wittig (Xilinx)

* HyperTransport3: José Duato (HyperTransport Consortium)

* PCIeGen3: Jasmin Ajan (PCI SIG & Intel)

* QuickPath: Bob Safranek (Intel)

Afternoon Tutorial: Open CL

Chair: John Nickolls (NVIDIA)

* Introductions: John Nickolls (NVIDIA)

* Khronos and the OpenCL Standard: Neil Trevett (Khronos)

* Overview of the OpenCL 1.0 Specification: Affie Munshi (Apple)

* Apple and OpenCL: Travis Brown (Apple)

* NVIDIA and OpenCL: Chris Lamb (NVIDIA) Demos

* Game Developers’ Perspective on OpenCL: Andrew Brownsword (Electronic Arts)

* OpenCL in Handheld Devices: Kari Pullo (Nokia)

* AMD and OpenCL: Mike Houston (AMD)

* HPC on OpenCL: TBD

* Panel Q&A: All Presenters



Monday, August 24, 2009


Opening Remarks

Server Systems I

Chair: Christos Kozyrakis (Stanford)

* NHM-EX CPU Architecture (Intel)

* Innovation Envelopes: Hot Chips in Blades (HP)

* Formula 1 Blade Computing with the AMD Magny Cours Processor (AMD)

Keynote 1: GPU Computing Revolution

Chair: John Nickolls (NVIDIA)

Jen-Hsun Huang, CEO (NVIDIA)



 Chair: Norm Jouppi (HP)

* The World’s First USB3.0 Storage Controller (Symwave)

* 40Gb/s Optical Active Cable Using Monolithic Transceivers in 0.13-µm SOI (Silicon Photonics)

* Intel® 5520 Chipset: An I/O Hub Chipset for Server, Workstation, and High End Desktop (Intel)

Parallel Computing Centers

Chairs: Dean Tullsen (UC San Diego)

Alan Smith (UC Berkeley)

* The Berkeley Parallel Computing Laboratory (UC Berkeley)

* Universal Parallel Computing Research Center: Making Parallel Programming Synonymous with Programming (UIUC)

* The Stanford Pervasive Parallelism Laboratory (PPL) (Stanford)

* Extended Question time

Client Processors

Chair: Jan-Willem van de Waerdt (NXP)

* Moorestown:The Innovation Platform for Next Generation MIDs (Intel)

* Architecture and Development of the OMAP 4430 (TI)

* ION: A Single-Chip Platform that Energizes Balanced PC Architectures (NVIDIA)

* Understanding the Intel® Microarchitectures (Nehalem and Westmere): Transitioning into the Mainstream (Intel)

Evening Panel: Technology Scaling at an Inflection Point: What next?

Chairs: Krste Asanovic (UC Berkeley)

Chuck Moore (AMD)



Tuesday, August 25, 2009


Computing Accelerators

Chair: Bevan Baas (UC Davis)

* SPARC64(TM) VIIIfx: Fujitsu’s New Generation Octo Core Processor for PETA Scale Computing (Fujitsu)

* Instruction Set Innovations for Convey’s HC-1 Computer (Convey Computer)

* Intel Xeon Socket-Compatible FPGA Architectures (Nallatech and ArchES Computing)

* Sun’s 3rd generation On-Chip UltraSPARC Security Accelerator (Sun)

Keynote 2: Let’s Get Small: How Computers are Making a Big Difference in the Games Business

Chair: Pradeep Dubey (Intel)

Rich Hilleman

Chief Creative Officer (CCO) (Electronic Arts)

SoCs and Clocking

Chair: Forest Baskett (NEA)

* PNX85500 – Single Chip LCD TV System with Integrated 120Hz HD Frame Rate Converter (NXP)

* IMAPCAR2: A Dynamic SIMD/MIMD Mode Switching Processor for Embedded Systems (NEC)

* SOC For Car Navigation Systems With A 53.3 GOPS Image Recognition Engine (Hitachi)

* New MEMS oscillators for high speed digital Systems (SiTime)


Chair: Chuck Thacker (Microsoft)

* Ultra Low Power FPGAs Fuel Faster Feature Evolution in Mobile Applications (SiliconBlue)

* Stratix IV GT and Arria II FPGAs (Altera)

* Virtex-6 and Spartan-6 FPGAs (Xilinx)

Server systems II

Chair: Jose Renau (UC Santa Cruz)

* Sun’s Next-Generation Multi-threaded Processor-Rainbow Falls (Sun)

* POWER7: IBM’s Next Generation POWER Microprocessor (IBM)

* POWER7: IBM’s Next Generation Balanced POWER Server Chip (IBM)

Closing Remarks


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Charlie Demerjian

Roving engine of chaos and snide remarks at SemiAccurate
Charlie Demerjian is the founder of Stone Arch Networking Services and is a technology news site; addressing hardware design, software selection, customization, securing and maintenance, with over one million views per month. He is a technologist and analyst specializing in semiconductors, system and network architecture. As head writer of, he regularly advises writers, analysts, and industry executives on technical matters and long lead industry trends. Charlie is also available through Guidepoint and Mosaic. FullyAccurate